STM32H742系列微控制器集成了工作频率高达480 MHz的Arm® Cortex®-M7内核（具有双精度浮点单元）。
性能
- 在480 MHz的CPU频率下，从Flash执行程序时，STM32H742系列能够提供2424 CoreMark /1027 DMIPS的性能，利用其L1缓存并实现了零等待执行。
- L1缓存（16 KB的I-缓存 +16 KB的D-缓存）提高外部存储器的执行性能。
高能效
- 多电源域架构可实现不同的电源域，并配置为低功耗模式，进而优化功耗效率。
- USB调节器提供嵌入式物理接口层（PHY）
- 在内核运行模式（关闭外设）下，功耗典型值为275 µA/MHz @VDD = 3.3 V和25 °C
- 低功耗待机模式下的典型功耗电流为2.43 µA
- 带RTC的VBAT模式（低功耗模式）下通常为750 nA
图形
- Chrom-ART Accelerator™提高了图形内容创建速度，并为其它应用节省了MCU内核处理带宽
片内外设
- 多达35个通信接口包括FD-CAN、USB 2.0高速/全速、以太网MAC、以及摄像头接口
- 可利用带有32位并行接口或双模Quad-SPI串行闪存接口的灵活存储控制器轻松扩展存储器容量
- 模拟外设：12位DAC，快速16位ADC
- 16位高精度定时器上的多个16位和32位定时器运行频率高达480 MHz
STM32H742系列提供1到2 MB的Flash存储器，具有以下结构的692 KB SRAM：192 KB的TCM RAM（包括64 KB的ITCM RAM和128 KB的DTCM RAM，用于时间关键型程序或数据），432 KB的用户SRAM，以及用于在最低功耗模式下保存数据的备份域4 KB SRAM。另外，它提供100至240引脚的BGA和LQFP封装型号。
精选 视频
As part of our embedded online event, we had the pleasure of filming with Reinhard Keil, a Senior Director of Embedded Tools at ARM.
This video is about the STM32L5, our recently announced ultra-low power microcontroller bringing a new security dimension. The STM32L5 is now in full production and all its ecosystem is available including hardware kits, software tools, firmware and all documentations of course. This is our first STM32 based on Cortex-M33 and its Trustzone and using specific ST security implementation - watch the video to find out more!
The STM32L5 is based on Arm® Cortex-M33 and TrustZone® technology combined with STMicroelectronics security implementation. On your STM32L562E-DK discovery board, TrustZone is disabled (factory setting) and you can develop as on any other STM32 device. This video shows how to enable TrustZone on STM32L562E-DK discovery using STM32CubeProgrammer and create, compile and debug or run a new project with STM32CubeIDE. It also shows how to open an example project delivered in STM32CubeL5 MCU Package, modify, compile and debug or run it. For further information, you can refer to AN5394 and AN5424 application notes.
- STM32H742BI High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 2MBytes of Flash memory, 692KBytes RAM, 480 MHz CPU, L1 cache, external memory interface, subset of peripherals
- STM32H742ZI High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 2MBytes of Flash memory, 692KB RAM, 480 MHz CPU, L1 cache, external memory interface, subset of peripherals
- STM32H742AI High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 2MBytes of Flash memory, 692KB RAM, 480 MHz CPU, L1 cache, external memory interface, subset of peripherals
- STM32H742ZG High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 1MByte of Flash memory, 692KB RAM, 480 MHz CPU, L1 cache, external memory interface, subset of peripherals
- STM32H742AG High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 1MByte of Flash memory, 692KB RAM, 480 MHz CPU, L1 cache, external memory interface, subset of peripherals
- STM32H742XI High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 2MBytes of Flash memory, 692KB RAM, 480 MHz CPU, L1 cache, external memory interface, subset of peripherals
- STM32H742XG High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 1MByte of Flash memory, 692KB RAM, 480 MHz CPU, L1 cache, external memory interface, subset of peripherals
- STM32H742VI High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 2MBytes of Flash memory, 692KB RAM, 480 MHz CPU, L1 cache, external memory interface, subset of peripherals
- STM32H742IG High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 1MBytes of Flash memory, 692KBytes RAM, 480 MHz CPU, L1 cache, external memory interface, subset of peripherals
- STM32H742VG High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 1MBytes of Flash memory, 692KB RAM, 480 MHz CPU, L1 cache, external memory interface, subset of peripherals
- STM32H742BG High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 1MBytes of Flash memory, 692KBytes RAM, 480 MHz CPU, L1 cache, external memory interface, subset of peripherals
- STM32H742II High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 2MBytes of Flash memory, 692KBytes RAM, 480 MHz CPU, L1 cache, external memory interface, subset of peripherals
